In a nonvolatile semiconductor memory device including memory cells with two-layered gate structures, capacitors in a peripheral circuit portion are each formed by use of a laminated film having a tunnel insulating film, floating gate electrode, interelectrode insulating film and control gate electrode formed on a silicon substrate like a memory cell portion. That is, the control gate electrode is separated by an interlayer insulating film, one of the separated regions is electrically connected to the floating gate electrode, a first contact plug is connected to the upper portion of one of the regions of the control gate electrode, a second contact plug is connected to the upper portion of the other region of the control gate electrode and a third contact plug is connected to the silicon substrate. Further, capacitors are formed between the floating gate electrode and the control gate electrode and between the floating gate electrode and the substrate.
At present, an intermetallic compound formed by use of silicon and a metal element is used as the control gate electrode. Particularly, since nickel silicide that is an intermetallic compound with nickel has low resistance and relatively high activation energy for silicide growth, it is desirably used as the control gate electrode.
However, in this type of silicide electrode, polycrystalline silicide crystal grains are condensed in the heat treatment at high temperatures and the uniformity of the structure and composition may be degraded in some cases. If the silicide electrode that is the control gate electrode is condensed and is non-uniformly formed, a contact plug penetrates a silicide-unformed portion of the control gate electrode to reach the lower-level interelectrode insulating film when the contact plug (second contact plug) is formed on the control gate electrode. Therefore, there occurs a problem that the control gate electrode and the floating gate electrode are short-circuited.
With respect to the example where capacitors are formed only between the floating gate electrode and the control gate electrode, a configuration is proposed wherein a contact plug is provided above an element isolation region (Jp-A 2002-141469(KOKAI)). However, this document does not disclose anything about the configuration wherein capacitors are formed between the floating gate electrode and the substrate as well, a conductive line leading from a third contact plug formed on the semiconductor substrate is provided, and that conductive line is connected to a second contact plug leading to the control gate electrode. In addition, the document does not discuss the problem wherein a silicide electrode may be condensed.